(1) Field of the Invention
This invention relates to a solid-state imaging device (or solid-state photosensor) in which photoelectric conversion elements and scanning circuits (scanners) are integrated on a monolithic semiconductor body.
More particularly, this invention relates to a solid-state imaging device in which insulated-gate field effect transistors (MOS transistors) constituting the device are improved.
(2) Description of the Prior Art
A solid-state imaging device for use in a television camera needs to have resolution which is equivalent to that of an image pickup tube employed in the present television broadcast. To this end, the solid-state imaging device requires photoelectric conversion elements on the order of 500 (vertical).times.400 (horizontal) picture elements, switching elements for X-Y addressing which correspond to the respective photoelectric conversion elements, and a horizontal scanning circuit and a vertical scanning circuit which turn "on" or "off" the switching elements and each of which is constructed of about 500 stages. Accordingly, it is usually fabricated by the use of the MOS-LSI technology with which a high packaging density is realized comparatively easily. FIG. 1 is a diagram for explaining the outline of such solid-state imaging device. Numeral 11 designates a horizontal scanning circuit for X or column addressing, and numeral 12 a vertical scanning circuit for Y or row addressing. Numeral 13 designates a vertical switching MOS transistor (hereinbelow, abbreviated to "MOST") which is turned "on" or "off" by a scanning pulse from the scanning circuit 12, numeral 14 a photodiode which exploits the source junction of the vertical MOST 13, and numeral 15 a vertical signal output line to which the drains of the vertical MOSTs 13 are connected in common. Numeral 16 indicates a horizontal switching MOST which is turned "on" or "off" by a scanning pulse from the horizontal scanning circuit 11 and which has its drain connected to a horizontal signal output line 17 and its source connected to the vertical signal output line 15. Shown at 18 is a driving voltage source for the photodiodes (video voltage source) which is connected to the horizontal signal output line 17 through a resistor 19. Numeral 20 indicates a signal output terminal. The two, horizontal and vertical scanning circuits turn "on" or "off" the switching MOSTs 16 and 13 one by one, to read out through the resistor 19 photocurrents from the photodiodes arrayed in two dimensions. Since the signals from the photodiodes correspond to an optical image of an object projected on these elements, video signals can be derived by the above operation. The features of the solid-state imaging device of this type are that the source of the switching MOST can be utilized for the photoelectric conversion and that a MOS shift register can be utilized for the scanning circuit.
Accordingly, it is ordinarily fabricated by the use of the MOS-LSI technology with which a high integration is comparatively easy and regarding which an example of a picture element structure is shown in FIG. 2. The picture element structure in FIG. 2 has been disclosed in U.S. Pat. No. 4,148,048. In FIG. 2, numeral 23 denotes a semiconductor substrate of the N-type conductivity for integrating photoelectric conversion elements, scanning circuits etc., and numeral 24 a a well of a semiconductor region of the P-type conductivity formed in a surface region of the N-type semiconductor substrate. Numeral 13 indicates a vertical switching MOST provided with agate electrode 25 to which a vertical scanning pulse from a vertical scanning circuit 12 is applied. Shown at 26 is the source of the MOST 13, which is a high impurity concentration region of the N-type conductivity and which forms a photodiode 14 at its PN-junction with the P-type well region. Shown at 27 is the drain of the MOST 13, which is a high impurity concentration region of the N-type conductivity and which is connected with a conductor layer 28 serving as a vertical signal output line 15. One end of the signal output line 28 (15) to which the drains of a plurality of switching MOSTs are connected in common is connected to a horizontal switching MOST 16 which is turned "on" or "off" by a horizontal scanning pulse from a horizontal scanning circuit 11, and the end of the switching MOST 16 remote from the signal output line 28 (15) is connected to a horizontal signal output line 17. The well region 24 and the substrate 23 are usually fixed to the ground voltage (zero V) (in some cases, the PN-junction between the well region and the substrate is reverse-biased). Numerals 291, 292 and 293 indicate insulating films, which are ordinarily SiO.sub.2 films.
The photodiode charged up to a video voltage V.sub.v by the scanning is discharged (.DELTA.V.sub.v) in accordance with the quantity of light having entered during one frame period. When the switching MOSTs 13 and 16 turn "on" in the next scanning, a charging current for charging the discharged component flows. This charging current is read out through a resistor 19 connected to a video voltage source 18, and a video signal can be provided at an output terminal 20.
The solid-state imaging device provided with the picture element structure shown in FIG. 2 disposes the P-type well region and forms the photoelectric conversion element in the well region, and can therefore prevent the occurrence of blooming. In addition, since infrared light is mostly absorbed within the substrate, the degradation of the resolution is not incurred, and the sensitivity in visible light is flattened to make it possible to obtain the video signal faithful to the object. This device has such many advantages. It has the most excellent characteristics among image pickup devices which have been proposed and developed up to the present time.
In order to make these solid-state imaging devices practicable, it is desirable from the viewpoint of yield that the die size or pellet size is as small as possible. However, a considerably high packaging density is needed in order to realize, for example, the solid-state imaging device of 500.times.400 picture elements on a scanning area for the 2/3 inch lens format (6.6 mm.times.8.8 mm). In integrating the photodiodes and the switching transistors or peripheral circuits on such small area, the newest high-density LSI fabrication technique is required. In actuality, such a technique of making the gate length of the MOS transistor 3 .mu.m or less is being applied to the solid-state imaging device. It has been revealed, however, that in case of applying such high-density LSI fabrication technique to the solid-state imaging device, there are the following two points as inherent problems:
1. Especially in a color image pickup device, a device in the case of employing a light source of short wavelength light, etc., the sensitivity to light on the short wavelength side (approximately 400-550 nm) is important. Since the absorption coefficient of silicon (Si) for the light of short wavelength is great, the light having entered the PN-junction is photoelectrically converted near the Si surface, generated minority carriers arriving at the junction portion owing to the diffusion or a drift field based on the gradient of concentration. At this time, however, when the impurity concentration (hereinbelow, termed the "surface impurity concentration") particularly in the vicinity of the Si surface (within 0.1 .mu.m-0.2 .mu.m from the surface) exceeds about 2.times.10.sup.20 /cm.sup.3, the photoelectric conversion efficiency degrades and it is as low as 60-70% as compared with that in the case where the concentration is lower than the aforecited value.
On the other hand, in a high integration LSI, it is common practice that as the gate length of the MOS transistor is made shorter, the PN-junctions of the source and drain of the MOST have the junction depth x.sub.j shallowed (usually, x.sub.j &lt;0.5 .mu.m for gate lengths of or below 3 .mu.m) for such reasons as preventing the degradation of the punch-through breakdown voltage, the increases of the sheet resistance of the source and drain regions ascribable to this measure being compensated for by increasing the impurity concentration. In this regard, the solid solubility limit of phosphorus in the Si substrate is about 1.times.10.sup.21 /cm.sup.3, that of arsenic is about 2.times.10.sup.21 /cm.sup.3 and that of boron is about 4.times.10.sup.20 /cm.sup.3 (all the values being at 1,000.degree. C.), and hence, the Si surface impurity concentrations of the source and drain regions exceed about 2.times.10.sup.20 /cm.sup.3 in the short-channel MOST in many cases. For the aforecited reason, accordingly, the MOST in the picture element of the solid-state imaging device cannot be put into the short channel by this method.
2. Since the absorption coefficient of Si for light on the long wavelength (about 600 nm or longer) side is small, the average position at which the photoelectric conversion takes place lies at a deep part of the Si substrate. As compared with the short-wavelength light, the long-wavelength light is low in the reflection factor at the Si surface and reaches the interior of the Si substrate well. Therefore, in order to establish the balance between the long- and short-wavelength lights, the sensitivity to the long-wavelength light is lowered particularly in a color photosensor by employing an infrared cutting filter or contriving the structure. However, in the PN-junction of x.sub.j &lt;0.5 .mu.m or so employed in the high integration LSI as stated in 1, it is sometimes the case that the sensitivity to the long-wavelength light lowers excessively and that the balance with the short-wavelength light is lost.